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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-06-11 19:30:37 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-06-11 19:30:37 +0000 |
| commit | c88bf54366f19d849b0b23f1ec6037e10fbc0d05 (patch) | |
| tree | 8b42b5f286da143fbc2b8a129006c5802b3bc20f /llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | |
| parent | 7c6e6e49cc2ed0b35b03f06a2a3a3208bb35fe45 (diff) | |
| download | bcm5719-llvm-c88bf54366f19d849b0b23f1ec6037e10fbc0d05.tar.gz bcm5719-llvm-c88bf54366f19d849b0b23f1ec6037e10fbc0d05.zip | |
[CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
llvm-svn: 239553
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp index e566a97789a..3cb082349b4 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -159,7 +159,7 @@ findLoopInstr(MachineBasicBlock *BB, int EndLoopOp, unsigned HexagonInstrInfo::InsertBranch( MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, - const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const { + ArrayRef<MachineOperand> Cond, DebugLoc DL) const { Opcode_t BOpc = Hexagon::J2_jump; Opcode_t BccOpc = Hexagon::J2_jumpt; @@ -1013,7 +1013,7 @@ int HexagonInstrInfo::getCondOpcode(int Opc, bool invertPredicate) const { bool HexagonInstrInfo:: PredicateInstruction(MachineInstr *MI, - const SmallVectorImpl<MachineOperand> &Cond) const { + ArrayRef<MachineOperand> Cond) const { if (Cond.empty() || isEndLoopN(Cond[0].getImm())) { DEBUG(dbgs() << "\nCannot predicate:"; MI->dump();); return false; @@ -1162,8 +1162,8 @@ HexagonInstrInfo::DefinesPredicate(MachineInstr *MI, bool HexagonInstrInfo:: -SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, - const SmallVectorImpl<MachineOperand> &Pred2) const { +SubsumesPredicate(ArrayRef<MachineOperand> Pred1, + ArrayRef<MachineOperand> Pred2) const { // TODO: Fix this return false; } @@ -1982,8 +1982,7 @@ bool HexagonInstrInfo::PredOpcodeHasJMP_c(Opcode_t Opcode) const { (Opcode == Hexagon::J2_jumpf); } -bool HexagonInstrInfo::predOpcodeHasNot( - const SmallVectorImpl<MachineOperand> &Cond) const { +bool HexagonInstrInfo::predOpcodeHasNot(ArrayRef<MachineOperand> Cond) const { if (Cond.empty() || !isPredicated(Cond[0].getImm())) return false; return !isPredicatedTrue(Cond[0].getImm()); @@ -1994,7 +1993,7 @@ bool HexagonInstrInfo::isEndLoopN(Opcode_t Opcode) const { Opcode == Hexagon::ENDLOOP1); } -bool HexagonInstrInfo::getPredReg(const SmallVectorImpl<MachineOperand> &Cond, +bool HexagonInstrInfo::getPredReg(ArrayRef<MachineOperand> Cond, unsigned &PredReg, unsigned &PredRegPos, unsigned &PredRegFlags) const { if (Cond.empty()) |
