summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
diff options
context:
space:
mode:
authorShiva Chen <shiva0217@gmail.com>2018-05-09 02:42:00 +0000
committerShiva Chen <shiva0217@gmail.com>2018-05-09 02:42:00 +0000
commit801bf7ebbed34577e730a53d6575035c26e39ac1 (patch)
tree841dab1f5e44ee7126122575dc501d8cf127136f /llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
parent667fbe2cb012f7b231b07379a2c9fc2358c393f0 (diff)
downloadbcm5719-llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.tar.gz
bcm5719-llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.zip
[DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to check all passes which use isDebugValue() to check MachineInstr is debug instruction or not. When expelling debug instructions, we should expel both DBG_VALUE and DBG_LABEL. So, I create a new function, isDebugInstr(), in MachineInstr to check whether the MachineInstr is debug instruction or not. This patch has no new test case. I have run regression test and there is no difference in regression test. Differential Revision: https://reviews.llvm.org/D45342 Patch by Hsiangkai Wang. llvm-svn: 331844
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 78e82579c47..1ec1ce01336 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -134,7 +134,7 @@ static unsigned nonDbgMICount(MachineBasicBlock::const_instr_iterator MIB,
MachineBasicBlock::const_instr_iterator MIE) {
unsigned Count = 0;
for (; MIB != MIE; ++MIB) {
- if (!MIB->isDebugValue())
+ if (!MIB->isDebugInstr())
++Count;
}
return Count;
@@ -419,7 +419,7 @@ bool HexagonInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
I = MBB.instr_end();
--I;
- while (I->isDebugValue()) {
+ while (I->isDebugInstr()) {
if (I == MBB.instr_begin())
return false;
--I;
@@ -562,7 +562,7 @@ unsigned HexagonInstrInfo::removeBranch(MachineBasicBlock &MBB,
unsigned Count = 0;
while (I != MBB.begin()) {
--I;
- if (I->isDebugValue())
+ if (I->isDebugInstr())
continue;
// Only removing branches from end of MBB.
if (!I->isBranch())
@@ -1626,7 +1626,7 @@ bool HexagonInstrInfo::isSchedulingBoundary(const MachineInstr &MI,
// considered a scheduling hazard, which is wrong. It should be the actual
// instruction preceding the dbg_value instruction(s), just like it is
// when debug info is not present.
- if (MI.isDebugValue())
+ if (MI.isDebugInstr())
return false;
// Throwing call is a boundary.
@@ -3164,7 +3164,7 @@ SmallVector<MachineInstr*, 2> HexagonInstrInfo::getBranchingInstrs(
I = MBB.instr_end();
--I;
- while (I->isDebugValue()) {
+ while (I->isDebugInstr()) {
if (I == MBB.instr_begin())
return Jumpers;
--I;
@@ -4201,7 +4201,7 @@ short HexagonInstrInfo::getRegForm(const MachineInstr &MI) const {
// use a constant extender, which requires another 4 bytes.
// For debug instructions and prolog labels, return 0.
unsigned HexagonInstrInfo::getSize(const MachineInstr &MI) const {
- if (MI.isDebugValue() || MI.isPosition())
+ if (MI.isDebugInstr() || MI.isPosition())
return 0;
unsigned Size = MI.getDesc().getSize();
OpenPOWER on IntegriCloud