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| author | Brendon Cahoon <bcahoon@codeaurora.org> | 2018-05-18 18:14:44 +0000 |
|---|---|---|
| committer | Brendon Cahoon <bcahoon@codeaurora.org> | 2018-05-18 18:14:44 +0000 |
| commit | e5ed563cc57f69b3f6a5bd242d8ff029dee3f271 (patch) | |
| tree | e2d8a09a27093f0b14ad50ee8d375b38d09e069d /llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | |
| parent | 083ea389d673e4dcfa3bee476598440f07d66ce6 (diff) | |
| download | bcm5719-llvm-e5ed563cc57f69b3f6a5bd242d8ff029dee3f271.tar.gz bcm5719-llvm-e5ed563cc57f69b3f6a5bd242d8ff029dee3f271.zip | |
[Hexagon] Generate post-increment for floating point types
The code that generates post-increments for Hexagon considered
integer values only. This patch adds support to generate them for
floating point values, f32 and f64.
Differential Revision: https://reviews.llvm.org/D47036
llvm-svn: 332748
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index 20e8dcdb06f..0d0b35118c1 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -93,11 +93,13 @@ void HexagonDAGToDAGISel::SelectIndexedLoad(LoadSDNode *LD, const SDLoc &dl) { Opcode = IsValidInc ? Hexagon::L2_loadrh_pi : Hexagon::L2_loadrh_io; break; case MVT::i32: + case MVT::f32: case MVT::v2i16: case MVT::v4i8: Opcode = IsValidInc ? Hexagon::L2_loadri_pi : Hexagon::L2_loadri_io; break; case MVT::i64: + case MVT::f64: case MVT::v2i32: case MVT::v4i16: case MVT::v8i8: @@ -483,11 +485,13 @@ void HexagonDAGToDAGISel::SelectIndexedStore(StoreSDNode *ST, const SDLoc &dl) { Opcode = IsValidInc ? Hexagon::S2_storerh_pi : Hexagon::S2_storerh_io; break; case MVT::i32: + case MVT::f32: case MVT::v2i16: case MVT::v4i8: Opcode = IsValidInc ? Hexagon::S2_storeri_pi : Hexagon::S2_storeri_io; break; case MVT::i64: + case MVT::f64: case MVT::v2i32: case MVT::v4i16: case MVT::v8i8: |
