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| author | Colin LeMahieu <colinl@codeaurora.org> | 2014-12-29 20:44:51 +0000 |
|---|---|---|
| committer | Colin LeMahieu <colinl@codeaurora.org> | 2014-12-29 20:44:51 +0000 |
| commit | bda31b42a0b4fc4e233b13a89fc194fef2fea2a4 (patch) | |
| tree | 100c430d69794f8ac775ee70f82b03c93dbedd35 /llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | |
| parent | 9a3cd3f58c654d9c268e1767a277ed066a84c35d (diff) | |
| download | bcm5719-llvm-bda31b42a0b4fc4e233b13a89fc194fef2fea2a4.tar.gz bcm5719-llvm-bda31b42a0b4fc4e233b13a89fc194fef2fea2a4.zip | |
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
llvm-svn: 224952
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index 374f625e966..ea3a1770ac3 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -735,10 +735,10 @@ SDNode *HexagonDAGToDAGISel::SelectIndexedStore(StoreSDNode *ST, SDLoc dl) { unsigned Opcode = 0; // Figure out the opcode. - if (StoredVT == MVT::i64) Opcode = Hexagon::STrid; - else if (StoredVT == MVT::i32) Opcode = Hexagon::STriw_indexed; - else if (StoredVT == MVT::i16) Opcode = Hexagon::STrih; - else if (StoredVT == MVT::i8) Opcode = Hexagon::STrib; + if (StoredVT == MVT::i64) Opcode = Hexagon::S2_storerd_io; + else if (StoredVT == MVT::i32) Opcode = Hexagon::S2_storeri_io; + else if (StoredVT == MVT::i16) Opcode = Hexagon::S2_storerh_io; + else if (StoredVT == MVT::i8) Opcode = Hexagon::S2_storerb_io; else llvm_unreachable("unknown memory type"); // Build regular store. @@ -788,10 +788,10 @@ SDNode *HexagonDAGToDAGISel::SelectBaseOffsetStore(StoreSDNode *ST, TargAddr); // Figure out base + offset opcode - if (StoredVT == MVT::i64) Opcode = Hexagon::STrid_indexed; - else if (StoredVT == MVT::i32) Opcode = Hexagon::STriw_indexed; - else if (StoredVT == MVT::i16) Opcode = Hexagon::STrih_indexed; - else if (StoredVT == MVT::i8) Opcode = Hexagon::STrib_indexed; + if (StoredVT == MVT::i64) Opcode = Hexagon::S2_storerd_io; + else if (StoredVT == MVT::i32) Opcode = Hexagon::S2_storeri_io; + else if (StoredVT == MVT::i16) Opcode = Hexagon::S2_storerh_io; + else if (StoredVT == MVT::i8) Opcode = Hexagon::S2_storerb_io; else llvm_unreachable("unknown memory type"); SDValue Ops[] = {SDValue(NewBase,0), |
