summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
diff options
context:
space:
mode:
authorBenjamin Kramer <benny.kra@googlemail.com>2017-10-13 20:46:14 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2017-10-13 20:46:14 +0000
commit9f21ca6361ad3f87f7bb3f27370c9feb79ccfb39 (patch)
tree3cfe56dbd4a5a519c0473a5c92411abf3ac19793 /llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
parent550c66d10f42e28325ccc738760f91fc51630d94 (diff)
downloadbcm5719-llvm-9f21ca6361ad3f87f7bb3f27370c9feb79ccfb39.tar.gz
bcm5719-llvm-9f21ca6361ad3f87f7bb3f27370c9feb79ccfb39.zip
[Hexagon] Avoid unused variable warnings in release builds.
No functionality change intended. llvm-svn: 315749
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
index c5ed9282c6a..6b10e21dad4 100644
--- a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
@@ -1627,11 +1627,13 @@ bool HCE::replaceInstrExpr(const ExtDesc &ED, const ExtenderInit &ExtI,
// If addi/subri are replaced with the exactly matching initializer,
// they amount to COPY.
// Check that the initializer is an exact match (for simplicity).
+#ifndef NDEBUG
bool IsAddi = ExtOpc == Hexagon::A2_addi;
const MachineOperand &RegOp = MI.getOperand(IsAddi ? 1 : 2);
const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1);
assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi &&
"Initializer mismatch");
+#endif
BuildMI(MBB, At, dl, HII->get(TargetOpcode::COPY))
.add(MI.getOperand(0))
.add(MachineOperand(ExtR));
@@ -1648,10 +1650,12 @@ bool HCE::replaceInstrExpr(const ExtDesc &ED, const ExtenderInit &ExtI,
// Check that Rs and V match the initializer expression. The Rs+V is the
// combination that is considered "subexpression" for V, although Rx+V
// would also be valid.
+#ifndef NDEBUG
bool IsSub = ExtOpc == Hexagon::S4_subaddi;
Register Rs = MI.getOperand(IsSub ? 3 : 2);
ExtValue V = MI.getOperand(IsSub ? 2 : 3);
assert(EV == V && Rs == Ex.Rs && IsSub == Ex.Neg && "Initializer mismatch");
+#endif
unsigned NewOpc = ExtOpc == Hexagon::M2_naccii ? Hexagon::A2_sub
: Hexagon::A2_add;
BuildMI(MBB, At, dl, HII->get(NewOpc))
OpenPOWER on IntegriCloud