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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 12:42:37 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 12:42:37 +0000
commit9d419d3b0cfda0f85d88633bd8620cd65ccb0498 (patch)
treee1fa028a9c3a8d514e67b9bac321519331979dea /llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
parent8dc603b03147c91ff4e66b8bfc934aad6c4cb4b3 (diff)
downloadbcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.tar.gz
bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.zip
[CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards: Function names should be verb phrases (as they represent actions), and command-like function should be imperative. The name should be camel case, and start with a lower case letter (e.g. openFile() or isFoo()). Differential Revision: https://reviews.llvm.org/D40416 llvm-svn: 319168
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
index 2235927d986..1e55c4b038e 100644
--- a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
@@ -422,7 +422,7 @@ namespace {
LLVM_ATTRIBUTE_UNUSED
raw_ostream &operator<< (raw_ostream &OS, const PrintRegister &P) {
if (P.Rs.Reg != 0)
- OS << PrintReg(P.Rs.Reg, &P.HRI, P.Rs.Sub);
+ OS << printReg(P.Rs.Reg, &P.HRI, P.Rs.Sub);
else
OS << "noreg";
return OS;
@@ -439,7 +439,7 @@ namespace {
raw_ostream &operator<< (raw_ostream &OS, const PrintExpr &P) {
OS << "## " << (P.Ex.Neg ? "- " : "+ ");
if (P.Ex.Rs.Reg != 0)
- OS << PrintReg(P.Ex.Rs.Reg, &P.HRI, P.Ex.Rs.Sub);
+ OS << printReg(P.Ex.Rs.Reg, &P.HRI, P.Ex.Rs.Sub);
else
OS << "__";
OS << " << " << P.Ex.S;
@@ -468,7 +468,7 @@ namespace {
const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
OS << "bb#" << MBB.getNumber() << ": ";
if (ED.Rd.Reg != 0)
- OS << PrintReg(ED.Rd.Reg, &HRI, ED.Rd.Sub);
+ OS << printReg(ED.Rd.Reg, &HRI, ED.Rd.Sub);
else
OS << "__";
OS << " = " << PrintExpr(ED.Expr, HRI);
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