diff options
author | Benjamin Kramer <benny.kra@googlemail.com> | 2015-07-18 17:43:23 +0000 |
---|---|---|
committer | Benjamin Kramer <benny.kra@googlemail.com> | 2015-07-18 17:43:23 +0000 |
commit | 9a5d788948a387076c2f6ac678b77ca5c07a4887 (patch) | |
tree | 0542b9e5156f9c1ff3da1ca60ee581bd05f9ee01 /llvm/lib/Target/Hexagon/BitTracker.cpp | |
parent | 5733e3512b833c48c77e95f18c7148e2a7042832 (diff) | |
download | bcm5719-llvm-9a5d788948a387076c2f6ac678b77ca5c07a4887.tar.gz bcm5719-llvm-9a5d788948a387076c2f6ac678b77ca5c07a4887.zip |
[Hexagon] Use composition instead of inheritance from STL types
The standard containers are not designed to be inherited from, as
illustrated by the MSVC hacks for NodeOrdering. No functional change
intended.
llvm-svn: 242616
Diffstat (limited to 'llvm/lib/Target/Hexagon/BitTracker.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/BitTracker.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Hexagon/BitTracker.cpp b/llvm/lib/Target/Hexagon/BitTracker.cpp index cb7e633fb82..111d3b4d01f 100644 --- a/llvm/lib/Target/Hexagon/BitTracker.cpp +++ b/llvm/lib/Target/Hexagon/BitTracker.cpp @@ -868,7 +868,7 @@ void BT::visitNonBranch(const MachineInstr *MI) { continue; bool Changed = false; - if (!Eval || !ResMap.has(RD.Reg)) { + if (!Eval || ResMap.count(RD.Reg) == 0) { // Set to "ref" (aka "bottom"). uint16_t DefBW = ME.getRegBitWidth(RD); RegisterCell RefC = RegisterCell::self(RD.Reg, DefBW); @@ -1005,7 +1005,7 @@ void BT::put(RegisterRef RR, const RegisterCell &RC) { // Replace all references to bits from OldRR with the corresponding bits // in NewRR. void BT::subst(RegisterRef OldRR, RegisterRef NewRR) { - assert(Map.has(OldRR.Reg) && "OldRR not present in map"); + assert(Map.count(OldRR.Reg) > 0 && "OldRR not present in map"); BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub); BitMask NM = ME.mask(NewRR.Reg, NewRR.Sub); uint16_t OMB = OM.first(), OME = OM.last(); |