summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/CellSPU
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2007-12-05 03:14:33 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-12-05 03:14:33 +0000
commitbb26301864354b6bfc01212d4aa0ef695fbdc833 (patch)
tree2a038c5528298d90a23e0f9d74a1a8d2078376b5 /llvm/lib/Target/CellSPU
parentd766e5d7c24b517bb8e2315dfd880dc78dedaed6 (diff)
downloadbcm5719-llvm-bb26301864354b6bfc01212d4aa0ef695fbdc833.tar.gz
bcm5719-llvm-bb26301864354b6bfc01212d4aa0ef695fbdc833.zip
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed. llvm-svn: 44600
Diffstat (limited to 'llvm/lib/Target/CellSPU')
-rw-r--r--llvm/lib/Target/CellSPU/SPURegisterInfo.cpp8
-rw-r--r--llvm/lib/Target/CellSPU/SPURegisterInfo.h4
2 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
index a9c7333dc75..683d97652cf 100644
--- a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -194,7 +194,7 @@ SPURegisterInfo::SPURegisterInfo(const SPUSubtarget &subtarget,
void
SPURegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
- unsigned SrcReg, int FrameIdx,
+ unsigned SrcReg, bool isKill, int FrameIdx,
const TargetRegisterClass *RC) const
{
MachineOpCode opc;
@@ -227,10 +227,12 @@ SPURegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
abort();
}
- addFrameReference(BuildMI(MBB, MI, TII.get(opc)).addReg(SrcReg), FrameIdx);
+ addFrameReference(BuildMI(MBB, MI, TII.get(opc))
+ .addReg(SrcReg, false, false, isKill), FrameIdx);
}
void SPURegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+ bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const {
@@ -258,7 +260,7 @@ void SPURegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
abort();
}
MachineInstrBuilder MIB = BuildMI(TII.get(Opc))
- .addReg(SrcReg, false, false, true);
+ .addReg(SrcReg, false, false, isKill);
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
if (MO.isRegister())
diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.h b/llvm/lib/Target/CellSPU/SPURegisterInfo.h
index 07e16d809a0..1eca442cae8 100644
--- a/llvm/lib/Target/CellSPU/SPURegisterInfo.h
+++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.h
@@ -44,11 +44,11 @@ namespace llvm {
//! Store a register to a stack slot, based on its register class.
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
- unsigned SrcReg, int FrameIndex,
+ unsigned SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC) const;
//! Store a register to an address, based on its register class
- void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+ void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const;
OpenPOWER on IntegriCloud