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| author | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
| commit | 5c4637816e6ff95cd489cb7b6edfcbd70990a772 (patch) | |
| tree | 64a6f730461f1fea00b3b6dd9c562f4dd8681171 /llvm/lib/Target/CellSPU/SPURegisterInfo.cpp | |
| parent | 86427bb2a9227fc531383089e494ba5edbe2efda (diff) | |
| download | bcm5719-llvm-5c4637816e6ff95cd489cb7b6edfcbd70990a772.tar.gz bcm5719-llvm-5c4637816e6ff95cd489cb7b6edfcbd70990a772.zip | |
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPURegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPURegisterInfo.cpp | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp index 8a85e742b08..f344da28c38 100644 --- a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -263,11 +263,11 @@ void SPURegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) - MIB.addReg(MO.getReg()); + MIB.addReg(MO.getReg()); else if (MO.isImmediate()) - MIB.addImm(MO.getImmedValue()); + MIB.addImm(MO.getImm()); else - MIB.addFrameIndex(MO.getFrameIndex()); + MIB.addFrameIndex(MO.getFrameIndex()); } NewMIs.push_back(MIB); } @@ -349,11 +349,11 @@ void SPURegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) - MIB.addReg(MO.getReg()); + MIB.addReg(MO.getReg()); else if (MO.isImmediate()) - MIB.addImm(MO.getImmedValue()); + MIB.addImm(MO.getImm()); else - MIB.addFrameIndex(MO.getFrameIndex()); + MIB.addFrameIndex(MO.getFrameIndex()); } NewMIs.push_back(MIB); } @@ -610,10 +610,9 @@ SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, MachineOperand &MO = MI.getOperand(OpNo); // Offset is biased by $lr's slot at the bottom. - Offset += MO.getImmedValue() + MFI->getStackSize() - + SPUFrameInfo::minStackSize(); + Offset += MO.getImm() + MFI->getStackSize() + SPUFrameInfo::minStackSize(); assert((Offset & 0xf) == 0 - && "16-byte alignment violated in SPURegisterInfo::eliminateFrameIndex"); + && "16-byte alignment violated in eliminateFrameIndex"); // Replace the FrameIndex with base register with $sp (aka $r1) SPOp.ChangeToRegister(SPU::R1, false); |
