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| author | Scott Michel <scottm@aero.org> | 2007-12-19 07:35:06 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2007-12-19 07:35:06 +0000 |
| commit | 9b834469e08312ef655154eb5d0fafc2ecf4b5af (patch) | |
| tree | 657cdb41e83c68cbaf24bbe2339022677f868c6b /llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | |
| parent | 721f601507a25016098131ce2c2ff8b0b09685f7 (diff) | |
| download | bcm5719-llvm-9b834469e08312ef655154eb5d0fafc2ecf4b5af.tar.gz bcm5719-llvm-9b834469e08312ef655154eb5d0fafc2ecf4b5af.zip | |
Add new immed16.ll test case, fix CellSPU errata to make test case work.
llvm-svn: 45196
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp index 5846aad72e2..efd45f56dcd 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -62,7 +62,6 @@ SPUInstrInfo::isMoveInstr(const MachineInstr& MI, case SPU::AHIvec: case SPU::AHIr16: case SPU::AIvec: - case SPU::AIr32: assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && @@ -74,6 +73,19 @@ SPUInstrInfo::isMoveInstr(const MachineInstr& MI, return true; } break; + case SPU::AIr32: + assert(MI.getNumOperands() == 3 && + "wrong number of operands to AIr32"); + if (MI.getOperand(0).isRegister() && + (MI.getOperand(1).isRegister() || + MI.getOperand(1).isFrameIndex()) && + (MI.getOperand(2).isImmediate() && + MI.getOperand(2).getImmedValue() == 0)) { + sourceReg = MI.getOperand(1).getReg(); + destReg = MI.getOperand(0).getReg(); + return true; + } + break; #if 0 case SPU::ORIf64: case SPU::ORIf32: |
