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authorDale Johannesen <dalej@apple.com>2009-02-13 02:30:42 +0000
committerDale Johannesen <dalej@apple.com>2009-02-13 02:30:42 +0000
commit635f2a69d997b676d1a277665544faba4e231cd1 (patch)
treebff25ffdd222ec8f1c33525868853e142b092732 /llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
parent460bfeba8c2ce90b3944c79eb278f94577598dee (diff)
downloadbcm5719-llvm-635f2a69d997b676d1a277665544faba4e231cd1.tar.gz
bcm5719-llvm-635f2a69d997b676d1a277665544faba4e231cd1.zip
Remove non-DebugLoc versions of BuildMI from Alpha and Cell.
llvm-svn: 64433
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/CellSPU/SPUInstrInfo.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
index d2ec7b1a1e4..439daaea3c2 100644
--- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -627,6 +627,8 @@ unsigned
SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond) const {
+ // FIXME this should probably have a DebugLoc argument
+ DebugLoc dl = DebugLoc::getUnknownLoc();
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
@@ -636,14 +638,14 @@ SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
if (FBB == 0) {
if (Cond.empty()) {
// Unconditional branch
- MachineInstrBuilder MIB = BuildMI(&MBB, get(SPU::BR));
+ MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(SPU::BR));
MIB.addMBB(TBB);
DEBUG(cerr << "Inserted one-way uncond branch: ");
DEBUG((*MIB).dump());
} else {
// Conditional branch
- MachineInstrBuilder MIB = BuildMI(&MBB, get(Cond[0].getImm()));
+ MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(Cond[0].getImm()));
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
DEBUG(cerr << "Inserted one-way cond branch: ");
@@ -651,8 +653,8 @@ SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
}
return 1;
} else {
- MachineInstrBuilder MIB = BuildMI(&MBB, get(Cond[0].getImm()));
- MachineInstrBuilder MIB2 = BuildMI(&MBB, get(SPU::BR));
+ MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(Cond[0].getImm()));
+ MachineInstrBuilder MIB2 = BuildMI(&MBB, dl, get(SPU::BR));
// Two-way Conditional Branch.
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
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