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author | Dale Johannesen <dalej@apple.com> | 2009-02-07 00:55:49 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2009-02-07 00:55:49 +0000 |
commit | 62fd95d6ec63e959cb10dc26e5506b4ee6d6344b (patch) | |
tree | f5cd7ef8c816136abbf6353b1311fc7dc072464d /llvm/lib/Target/CellSPU/SPUISelLowering.cpp | |
parent | 5d7662cfe039ba460ae14815cd3b7f179f80fe68 (diff) | |
download | bcm5719-llvm-62fd95d6ec63e959cb10dc26e5506b4ee6d6344b.tar.gz bcm5719-llvm-62fd95d6ec63e959cb10dc26e5506b4ee6d6344b.zip |
Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base. There's no
sensible way to associate debug info with these. I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands.
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.
llvm-svn: 63992
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/CellSPU/SPUISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp index f4c5120e7a9..f8d60f51a56 100644 --- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp @@ -922,7 +922,7 @@ LowerConstantFP(SDValue Op, SelectionDAG &DAG) { SDValue T = DAG.getConstant(dbits, MVT::i64); SDValue Tvec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T); return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, - DAG.getNode(ISD::BIT_CONVERT, MVT::v2f64, Tvec)); + DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2f64, Tvec)); } return SDValue(); @@ -2536,7 +2536,7 @@ static SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG, ISD::SETGT)); } - SDValue i64rhs = DAG.getNode(ISD::BIT_CONVERT, IntVT, rhs); + SDValue i64rhs = DAG.getNode(ISD::BIT_CONVERT, dl, IntVT, rhs); SDValue rhsHi32 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, DAG.getNode(ISD::SRL, dl, IntVT, @@ -2677,7 +2677,7 @@ static SDValue LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) PromoteScalar, PromoteScalar, shufMask); return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, - DAG.getNode(ISD::BIT_CONVERT, VecVT, truncShuffle)); + DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, truncShuffle)); } return SDValue(); // Leave the truncate unmolested |