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author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2010-06-09 09:58:17 +0000 |
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committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2010-06-09 09:58:17 +0000 |
commit | 5e0862f7f567ec6a620422299c5a8ce02b94ce3f (patch) | |
tree | 4c6cd55f27cef89056fe1eda43a5424a4b7c66d6 /llvm/lib/Target/CellSPU/SPUISelLowering.cpp | |
parent | 53444d394fd4b95b9465c4517b3714bb0ce3e0ce (diff) | |
download | bcm5719-llvm-5e0862f7f567ec6a620422299c5a8ce02b94ce3f.tar.gz bcm5719-llvm-5e0862f7f567ec6a620422299c5a8ce02b94ce3f.zip |
Fix SPU to cope with vector insertelement to an undef position.
We default to inserting to lane 0.
llvm-svn: 105722
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/CellSPU/SPUISelLowering.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp index 081e8d0db0e..affd066876f 100644 --- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp @@ -2056,14 +2056,19 @@ static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) { DebugLoc dl = Op.getDebugLoc(); EVT VT = Op.getValueType(); - ConstantSDNode *CN = cast<ConstantSDNode>(IdxOp); - assert(CN != 0 && "LowerINSERT_VECTOR_ELT: Index is not constant!"); + // use 0 when the lane to insert to is 'undef' + int64_t Idx=0; + if (IdxOp.getOpcode() != ISD::UNDEF) { + ConstantSDNode *CN = cast<ConstantSDNode>(IdxOp); + assert(CN != 0 && "LowerINSERT_VECTOR_ELT: Index is not constant!"); + Idx = (CN->getSExtValue()); + } EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); // Use $sp ($1) because it's always 16-byte aligned and it's available: SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, DAG.getRegister(SPU::R1, PtrVT), - DAG.getConstant(CN->getSExtValue(), PtrVT)); + DAG.getConstant(Idx, PtrVT)); SDValue ShufMask = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, VT, Pointer); SDValue result = |