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| author | Scott Michel <scottm@aero.org> | 2009-01-06 03:36:14 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2009-01-06 03:36:14 +0000 |
| commit | 6887caf11c6f4fecb90cb6a30694176a5a9c7bca (patch) | |
| tree | b066441af2bed5a4c20ddde3b22528b099c50e98 /llvm/lib/Target/CellSPU/SPUCallingConv.td | |
| parent | e5e454e199949dc91332584366b00230a18460a2 (diff) | |
| download | bcm5719-llvm-6887caf11c6f4fecb90cb6a30694176a5a9c7bca.tar.gz bcm5719-llvm-6887caf11c6f4fecb90cb6a30694176a5a9c7bca.zip | |
CellSPU:
- Fix bugs 3194, 3195: i128 load/stores produce correct code (although, we
need to ensure that i128 is 16-byte aligned in real life), and 128 zero-
extends are supported.
- New td file: SPU128InstrInfo.td: this is where all new i128 support should
be put in the future.
- Continue to hammer on i64 operations and test cases; ensure that the only
remaining problem will be i64 mul.
llvm-svn: 61784
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUCallingConv.td')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUCallingConv.td | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUCallingConv.td b/llvm/lib/Target/CellSPU/SPUCallingConv.td index 4bad19850a0..5213e424523 100644 --- a/llvm/lib/Target/CellSPU/SPUCallingConv.td +++ b/llvm/lib/Target/CellSPU/SPUCallingConv.td @@ -21,10 +21,11 @@ class CCIfSubtarget<string F, CCAction A> // Return-value convention for Cell SPU: Everything can be passed back via $3: def RetCC_SPU : CallingConv<[ - CCIfType<[i8], CCAssignToReg<[R3]>>, - CCIfType<[i16], CCAssignToReg<[R3]>>, - CCIfType<[i32], CCAssignToReg<[R3]>>, - CCIfType<[i64], CCAssignToReg<[R3]>>, + CCIfType<[i8], CCAssignToReg<[R3]>>, + CCIfType<[i16], CCAssignToReg<[R3]>>, + CCIfType<[i32], CCAssignToReg<[R3]>>, + CCIfType<[i64], CCAssignToReg<[R3]>>, + CCIfType<[i128], CCAssignToReg<[R3]>>, CCIfType<[f32, f64], CCAssignToReg<[R3]>>, CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>> ]>; |
