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| author | Chris Lattner <sabre@nondot.org> | 2005-09-28 19:27:25 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-28 19:27:25 +0000 |
| commit | 8bb25cd68a98db0f7f9f222c20cbfbce2e32e1cd (patch) | |
| tree | 29b5971d769a549b6b5006ca059600d1e36290b0 /llvm/lib/Target/Alpha/AlphaJITInfo.cpp | |
| parent | b97b054ba7fd59a8357b9821af2175c8af8b17fa (diff) | |
| download | bcm5719-llvm-8bb25cd68a98db0f7f9f222c20cbfbce2e32e1cd.tar.gz bcm5719-llvm-8bb25cd68a98db0f7f9f222c20cbfbce2e32e1cd.zip | |
Emit an error if instructions or patterns are defined but can never match.
Currently we check that immediate values live on the RHS of commutative
operators. Defining ORI like this, for example:
def ORI : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
"ori $dst, $src1, $src2",
[(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;
results in:
tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaJITInfo.cpp')
0 files changed, 0 insertions, 0 deletions
