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| author | Torok Edwin <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
|---|---|---|
| committer | Torok Edwin <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
| commit | fb8d6d5b585eaff2375db2dfd0f235e14c01a3d0 (patch) | |
| tree | 51caa27009170c24962a0ca61b34e351914e3852 /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | |
| parent | c9673d5baecca92a7f879e972de63b1e8b59aec8 (diff) | |
| download | bcm5719-llvm-fb8d6d5b585eaff2375db2dfd0f235e14c01a3d0.tar.gz bcm5719-llvm-fb8d6d5b585eaff2375db2dfd0f235e14c01a3d0.zip | |
Implement changes from Chris's feedback.
Finish converting lib/Target.
llvm-svn: 75043
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index 17a9bc2f689..62b5d4c3012 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -201,7 +201,7 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, @@ -217,7 +217,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::STQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)); @@ -246,7 +246,7 @@ AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, @@ -261,7 +261,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::LDQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); |
