diff options
author | Dan Gohman <gohman@apple.com> | 2009-06-03 20:30:14 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2009-06-03 20:30:14 +0000 |
commit | d5ca70648c5e610098f1ca09365923d6ae96cb47 (patch) | |
tree | 1999c06e23b0feb1ba0f255bb826d0b2d2426200 /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | |
parent | 4751bb9edb24eec2b8b58ce2c9b690ea52d31124 (diff) | |
download | bcm5719-llvm-d5ca70648c5e610098f1ca09365923d6ae96cb47.tar.gz bcm5719-llvm-d5ca70648c5e610098f1ca09365923d6ae96cb47.zip |
Convert Alpha and Mips to use a MachineFunctionInfo subclass to
carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.
llvm-svn: 72802
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index a54d97d33c4..229f9d4784a 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -13,7 +13,9 @@ #include "Alpha.h" #include "AlphaInstrInfo.h" +#include "AlphaMachineFunctionInfo.h" #include "AlphaGenInstrInfo.inc" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineInstrBuilder.h" @@ -448,3 +450,54 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { return false; } +/// getGlobalBaseReg - Return a virtual register initialized with the +/// the global base register value. Output instructions required to +/// initialize the register in the function entry block, if necessary. +/// +unsigned AlphaInstrInfo::getGlobalBaseReg(MachineFunction *MF) const { + AlphaMachineFunctionInfo *AlphaFI = MF->getInfo<AlphaMachineFunctionInfo>(); + unsigned GlobalBaseReg = AlphaFI->getGlobalBaseReg(); + if (GlobalBaseReg != 0) + return GlobalBaseReg; + + // Insert the set of GlobalBaseReg into the first MBB of the function + MachineBasicBlock &FirstMBB = MF->front(); + MachineBasicBlock::iterator MBBI = FirstMBB.begin(); + MachineRegisterInfo &RegInfo = MF->getRegInfo(); + const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); + + GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); + bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Alpha::R29, + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + assert(Ok && "Couldn't assign to global base register!"); + RegInfo.addLiveIn(Alpha::R29); + + AlphaFI->setGlobalBaseReg(GlobalBaseReg); + return GlobalBaseReg; +} + +/// getGlobalRetAddr - Return a virtual register initialized with the +/// the global base register value. Output instructions required to +/// initialize the register in the function entry block, if necessary. +/// +unsigned AlphaInstrInfo::getGlobalRetAddr(MachineFunction *MF) const { + AlphaMachineFunctionInfo *AlphaFI = MF->getInfo<AlphaMachineFunctionInfo>(); + unsigned GlobalRetAddr = AlphaFI->getGlobalRetAddr(); + if (GlobalRetAddr != 0) + return GlobalRetAddr; + + // Insert the set of GlobalRetAddr into the first MBB of the function + MachineBasicBlock &FirstMBB = MF->front(); + MachineBasicBlock::iterator MBBI = FirstMBB.begin(); + MachineRegisterInfo &RegInfo = MF->getRegInfo(); + const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); + + GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); + bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalRetAddr, Alpha::R26, + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + assert(Ok && "Couldn't assign to global return address register!"); + RegInfo.addLiveIn(Alpha::R26); + + AlphaFI->setGlobalRetAddr(GlobalRetAddr); + return GlobalRetAddr; +} |