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authorEvan Cheng <evan.cheng@apple.com>2009-01-20 19:12:24 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-01-20 19:12:24 +0000
commitc544cb0ecab3a54eec7e385b7b9458e40dc49bfd (patch)
treede996c960e7e54b9d08871e3d9f1cccff77debff /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
parent1ce41edd8da47d7c438c18a819ced3237a2f49f7 (diff)
downloadbcm5719-llvm-c544cb0ecab3a54eec7e385b7b9458e40dc49bfd.tar.gz
bcm5719-llvm-c544cb0ecab3a54eec7e385b7b9458e40dc49bfd.zip
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
llvm-svn: 62600
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaInstrInfo.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
index fa8224f113f..2c7404d5647 100644
--- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
+++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
@@ -25,8 +25,8 @@ AlphaInstrInfo::AlphaInstrInfo()
bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI,
- unsigned& sourceReg,
- unsigned& destReg) const {
+ unsigned& sourceReg, unsigned& destReg,
+ unsigned& SrcSR, unsigned& DstSR) const {
unsigned oc = MI.getOpcode();
if (oc == Alpha::BISr ||
oc == Alpha::CPYSS ||
@@ -43,6 +43,7 @@ bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI,
if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) {
sourceReg = MI.getOperand(1).getReg();
destReg = MI.getOperand(0).getReg();
+ SrcSR = DstSR = 0;
return true;
}
}
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