diff options
author | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
commit | 779c69bbc56a0bb907d204233c6fb42305208392 (patch) | |
tree | cb2cc3a26190557e10219dd3f233d9546bcdb9cb /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | |
parent | efb126a665e0d3f6b4dfbcfc5d909bf0f4145198 (diff) | |
download | bcm5719-llvm-779c69bbc56a0bb907d204233c6fb42305208392.tar.gz bcm5719-llvm-779c69bbc56a0bb907d204233c6fb42305208392.zip |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
llvm-svn: 103194
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index a4df40c199b..3aba3639a5f 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -146,16 +146,14 @@ bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const { + const TargetRegisterClass *SrcRC, + DebugLoc DL) const { //cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n"; if (DestRC != SrcRC) { // Not yet supported! return false; } - DebugLoc DL; - if (MI != MBB.end()) DL = MI->getDebugLoc(); - if (DestRC == Alpha::GPRCRegisterClass) { BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg) .addReg(SrcReg) @@ -431,7 +429,8 @@ unsigned AlphaInstrInfo::getGlobalBaseReg(MachineFunction *MF) const { GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Alpha::R29, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, + DebugLoc()); assert(Ok && "Couldn't assign to global base register!"); Ok = Ok; // Silence warning when assertions are turned off. RegInfo.addLiveIn(Alpha::R29); @@ -458,7 +457,8 @@ unsigned AlphaInstrInfo::getGlobalRetAddr(MachineFunction *MF) const { GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalRetAddr, Alpha::R26, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, + DebugLoc()); assert(Ok && "Couldn't assign to global return address register!"); Ok = Ok; // Silence warning when assertions are turned off. RegInfo.addLiveIn(Alpha::R26); |