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| author | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
| commit | 3b46030375b309ac6e198664bbbf859884318084 (patch) | |
| tree | 384b02de07f0f190d5753652f676f6c9a9a7d00c /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | |
| parent | 7f8b6d5f8034a78638f9e82e42b6e647bed7106e (diff) | |
| download | bcm5719-llvm-3b46030375b309ac6e198664bbbf859884318084.tar.gz bcm5719-llvm-3b46030375b309ac6e198664bbbf859884318084.zip | |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index 6f96ff0f1e8..a602770eca7 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -194,7 +194,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else abort(); MachineInstrBuilder MIB = - BuildMI(get(Opc)).addReg(SrcReg, false, false, isKill); + BuildMI(MF, get(Opc)).addReg(SrcReg, false, false, isKill); for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) @@ -239,7 +239,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, else abort(); MachineInstrBuilder MIB = - BuildMI(get(Opc), DestReg); + BuildMI(MF, get(Opc), DestReg); for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) @@ -272,7 +272,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperand(MachineFunction &MF, bool isKill = MI->getOperand(1).isKill(); Opc = (Opc == Alpha::BISr) ? Alpha::STQ : ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); - NewMI = BuildMI(get(Opc)).addReg(InReg, false, false, isKill) + NewMI = BuildMI(MF, get(Opc)).addReg(InReg, false, false, isKill) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } else { // load -> move @@ -280,7 +280,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperand(MachineFunction &MF, bool isDead = MI->getOperand(0).isDead(); Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); - NewMI = BuildMI(get(Opc)).addReg(OutReg, true, false, false, isDead) + NewMI = BuildMI(MF, get(Opc)).addReg(OutReg, true, false, false, isDead) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } |
