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authorAndrew Lenharth <andrewl@lenharth.org>2005-04-07 18:15:28 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-04-07 18:15:28 +0000
commit9807ac5d3ca1cbea573e5ce6649072b270ee6ab8 (patch)
tree95412bb4a92de1dcecd9e05405edf6901a648dd5 /llvm/lib/Target/Alpha/AlphaISelPattern.cpp
parent6b03a0cba1d90209d79bbe2eba98dd5ea5538590 (diff)
downloadbcm5719-llvm-9807ac5d3ca1cbea573e5ce6649072b270ee6ab8.tar.gz
bcm5719-llvm-9807ac5d3ca1cbea573e5ce6649072b270ee6ab8.zip
fix a small optimization opertunity and make gcc happy
llvm-svn: 21143
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelPattern.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelPattern.cpp4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
index cfd58757317..381ecdd7b92 100644
--- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1090,7 +1090,7 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
unsigned ISel::SelectExpr(SDOperand N) {
unsigned Result;
- unsigned Tmp1, Tmp2, Tmp3;
+ unsigned Tmp1, Tmp2 = 0, Tmp3;
unsigned Opc = 0;
unsigned opcode = N.getOpcode();
@@ -1448,7 +1448,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
- Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
}
return Result;
@@ -1810,7 +1809,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
{
unsigned k = ExactLog2(abs(CSD->getSignExtended()));
Tmp1 = SelectExpr(N.getOperand(0));
- Tmp2 = MakeReg(MVT::i64);
if (k == 1)
Tmp2 = Tmp1;
else
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