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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-27 07:58:15 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-27 07:58:15 +0000 |
| commit | 96515adad6fbccadba260db83fde3d3593185f55 (patch) | |
| tree | 6f4363a9d35e1ee6ddc894ae16baa1a7da1ea7f6 /llvm/lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 0cceb5165e9e2ce6632c77a79a082291f5b80a0a (diff) | |
| download | bcm5719-llvm-96515adad6fbccadba260db83fde3d3593185f55.tar.gz bcm5719-llvm-96515adad6fbccadba260db83fde3d3593185f55.zip | |
Floating point instructions like Floating point registers
llvm-svn: 19856
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp index b9abf4661b4..bae321edaad 100644 --- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp @@ -333,7 +333,7 @@ unsigned ISel::SelectExpr(SDOperand N) { if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) { if (CN->isExactlyValue(+0.0) || CN->isExactlyValue(-0.0)) { - BuildMI(BB, Alpha::CPYS, 2, Result).addReg(R31).addReg(R31); + BuildMI(BB, Alpha::CPYS, 2, Result).addReg(Alpha::F31).addReg(Alpha::F31); } else { abort(); } |
