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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-07 06:21:37 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-07 06:21:37 +0000 |
| commit | 57047720ce3295a37104d76c155a1001d6263693 (patch) | |
| tree | dd394d3fe20e52d484f75b5e2802fd498611420e /llvm/lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 351df0c2dcdaed25fc1f6e632540e3d97aebc78d (diff) | |
| download | bcm5719-llvm-57047720ce3295a37104d76c155a1001d6263693.tar.gz bcm5719-llvm-57047720ce3295a37104d76c155a1001d6263693.zip | |
copyfromreg fix
llvm-svn: 20062
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp index 94a9ad521c6..6e4704c3ce5 100644 --- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp @@ -589,8 +589,11 @@ unsigned ISel::SelectExpr(SDOperand N) { } if (DestType == MVT::f64 || DestType == MVT::f32 || - (opcode == ISD::LOAD && - (N.getValue(0).getValueType() == MVT::f32 || N.getValue(0).getValueType() == MVT::f64))) + ( + (opcode == ISD::LOAD || opcode == ISD::CopyFromReg || opcode == ISD::EXTLOAD) && + (N.getValue(0).getValueType() == MVT::f32 || N.getValue(0).getValueType() == MVT::f64) + ) + ) return SelectExprFP(N, Result); switch (opcode) { @@ -747,7 +750,7 @@ unsigned ISel::SelectExpr(SDOperand N) { { //no need to restore GP as we are doing an indirect call Tmp1 = SelectExpr(N.getOperand(1)); - BuildMI(BB, Alpha::BIS, 2, Alpha::R27).addReg(Tmp1).addReg(Tmp1); + BuildMI(BB, Alpha::BIS, 2, Alpha::R27).addReg(Tmp1).addReg(Tmp1); BuildMI(BB, Alpha::JSR, 2, Alpha::R26).addReg(Alpha::R27).addImm(0); } |
