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authorOwen Anderson <resistor@mac.com>2011-02-25 21:41:48 +0000
committerOwen Anderson <resistor@mac.com>2011-02-25 21:41:48 +0000
commitb2c80da4aef31d8761232ed1ff8f233fc0ef664d (patch)
tree2451b249a4431b71116d00ad4a536d2817ff8c7e /llvm/lib/Target/Alpha/AlphaISelLowering.cpp
parent51433bf6881d20a10d0ecf4da0ae62e44c0f196c (diff)
downloadbcm5719-llvm-b2c80da4aef31d8761232ed1ff8f233fc0ef664d.tar.gz
bcm5719-llvm-b2c80da4aef31d8761232ed1ff8f233fc0ef664d.zip
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
llvm-svn: 126518
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelLowering.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelLowering.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index 9137d654edb..c4f43ab9e4e 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -48,7 +48,6 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM)
: TargetLowering(TM, new TargetLoweringObjectFileELF()) {
// Set up the TargetLowering object.
//I am having problems with shr n i8 1
- setShiftAmountType(MVT::i64);
setBooleanContents(ZeroOrOneBooleanContent);
addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass);
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