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| author | Duncan Sands <baldrick@free.fr> | 2009-01-01 15:52:00 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2009-01-01 15:52:00 +0000 |
| commit | 8feb694e8f6757e8a7ef99664152ab1fc33fa4f5 (patch) | |
| tree | 0990a42a47f947a29ec9988f3bf2b0d28cbe2cf3 /llvm/lib/Target/Alpha/AlphaISelLowering.cpp | |
| parent | bcf15388abaed2a55ae772fd2ee5872662d13a8e (diff) | |
| download | bcm5719-llvm-8feb694e8f6757e8a7ef99664152ab1fc33fa4f5.tar.gz bcm5719-llvm-8feb694e8f6757e8a7ef99664152ab1fc33fa4f5.zip | |
Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).
llvm-svn: 61542
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index 7b0fcca9a37..793d475e0dd 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -159,7 +159,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM) computeRegisterProperties(); } -MVT AlphaTargetLowering::getSetCCResultType(const SDValue &) const { +MVT AlphaTargetLowering::getSetCCResultType(MVT VT) const { return MVT::i64; } |

