summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff options
context:
space:
mode:
authorEric Christopher <echristo@apple.com>2011-06-29 21:05:54 +0000
committerEric Christopher <echristo@apple.com>2011-06-29 21:05:54 +0000
commit03e756b93b7b49f2b2d0b7b0f3fb5ed0cd1169af (patch)
tree7228b45ffb1730ac4ec0935b4e5384162d6ceac1 /llvm/lib/Target/Alpha/AlphaISelLowering.cpp
parentff218bd3fd5ae4bd89215f93a16ff01db58bf5c1 (diff)
downloadbcm5719-llvm-03e756b93b7b49f2b2d0b7b0f3fb5ed0cd1169af.tar.gz
bcm5719-llvm-03e756b93b7b49f2b2d0b7b0f3fb5ed0cd1169af.zip
Remove todo.
llvm-svn: 134094
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelLowering.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelLowering.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index e8aaf353b33..54433a4c36f 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -835,8 +835,6 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
case 'r':
return std::make_pair(0U, Alpha::GPRCRegisterClass);
case 'f':
- // TODO: Do we need to add the 64-bit register class here when
- // it contains the same registers?
return std::make_pair(0U, Alpha::F4RCRegisterClass);
}
}
OpenPOWER on IntegriCloud