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authorAndrew Lenharth <andrewl@lenharth.org>2005-12-25 01:34:27 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-12-25 01:34:27 +0000
commit0fce613effa0e1192ff7bb74df8d625acd0e6969 (patch)
treeb0f61f1f4a8bf8a3fd585a0e71977b23a94d8b62 /llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
parent30db2ec59f07aecb55cf385a87d7d6e0d67f873c (diff)
downloadbcm5719-llvm-0fce613effa0e1192ff7bb74df8d625acd0e6969.tar.gz
bcm5719-llvm-0fce613effa0e1192ff7bb74df8d625acd0e6969.zip
All that just to lower div and rem
llvm-svn: 25008
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp49
1 files changed, 13 insertions, 36 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 5eddf5dde9f..5fadc81ce84 100644
--- a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -206,16 +206,20 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
case AlphaISD::GlobalBaseReg:
return getGlobalBaseReg();
- case ISD::TargetConstantPool: {
- Constant *C = cast<ConstantPoolSDNode>(N)->get();
- SDOperand Tmp, CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
- Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI, getGlobalBaseReg());
- return CurDAG->SelectNodeTo(N, Alpha::LDAr, MVT::i64, CPI, Tmp);
+ case AlphaISD::DivCall: {
+ SDOperand Chain = CurDAG->getEntryNode();
+ Chain = CurDAG->getCopyToReg(Chain, Alpha::R24, Select(Op.getOperand(1)),
+ SDOperand(0,0));
+ Chain = CurDAG->getCopyToReg(Chain, Alpha::R25, Select(Op.getOperand(2)),
+ Chain.getValue(1));
+ Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Select(Op.getOperand(0)),
+ Chain.getValue(1));
+ Chain = CurDAG->getTargetNode(Alpha::JSRsDAG, MVT::Other, MVT::Flag,
+ Chain, Chain.getValue(1));
+ Chain = CurDAG->getCopyFromReg(Chain, Alpha::R27, MVT::i64,
+ Chain.getValue(1));
+ return CurDAG->SelectNodeTo(N, Alpha::BIS, MVT::i64, Chain, Chain);
}
- case ISD::ExternalSymbol:
- return CurDAG->SelectNodeTo(N, Alpha::LDQl, MVT::i64,
- CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(), MVT::i64),
- getGlobalBaseReg());
case ISD::RET: {
SDOperand Chain = Select(N->getOperand(0)); // Token chain.
@@ -268,33 +272,6 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
}
break;
}
- case ISD::SDIV:
- case ISD::UDIV:
- case ISD::UREM:
- case ISD::SREM:
- if (MVT::isInteger(N->getValueType(0))) {
- const char* opstr = 0;
- switch(N->getOpcode()) {
- case ISD::UREM: opstr = "__remqu"; break;
- case ISD::SREM: opstr = "__remq"; break;
- case ISD::UDIV: opstr = "__divqu"; break;
- case ISD::SDIV: opstr = "__divq"; break;
- }
- SDOperand Tmp1 = Select(N->getOperand(0)),
- Tmp2 = Select(N->getOperand(1)),
- Addr = Select(CurDAG->getExternalSymbol(opstr,
- AlphaLowering.getPointerTy()));
- SDOperand Chain;
- Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), Alpha::R24, Tmp1,
- SDOperand(0,0));
- Chain = CurDAG->getCopyToReg(Chain, Alpha::R25, Tmp2, Chain.getValue(1));
- Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Addr, Chain.getValue(1));
- Chain = CurDAG->getTargetNode(Alpha::JSRsDAG, MVT::Other, MVT::Flag,
- Chain, Chain.getValue(1));
- return CurDAG->getCopyFromReg(Chain, Alpha::R27, MVT::i64,
- Chain.getValue(1));
- }
- break;
case ISD::SETCC:
if (MVT::isFloatingPoint(N->getOperand(0).Val->getValueType(0))) {
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