summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
diff options
context:
space:
mode:
authorDan Gohman <gohman@apple.com>2008-02-10 18:45:23 +0000
committerDan Gohman <gohman@apple.com>2008-02-10 18:45:23 +0000
commit3a4be0fdefc64931e6ae95165c529a916e4dd32d (patch)
tree9ffd3d1f95550f841f32371fb7ec29de8d2e0ed5 /llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
parent60fb1d80fe7d72057737e9b81049efbc78244207 (diff)
downloadbcm5719-llvm-3a4be0fdefc64931e6ae95165c529a916e4dd32d.tar.gz
bcm5719-llvm-3a4be0fdefc64931e6ae95165c529a916e4dd32d.zip
Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 03ed3d6b68f..067a8efb3ce 100644
--- a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -75,7 +75,8 @@ void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
{
const MachineOperand &MO = MI->getOperand(opNum);
if (MO.getType() == MachineOperand::MO_Register) {
- assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
+ assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
+ "Not physreg??");
O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else if (MO.isImmediate()) {
O << MO.getImm();
@@ -87,7 +88,7 @@ void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
+ const TargetRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_Register:
OpenPOWER on IntegriCloud