diff options
| author | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
| commit | 116bbab4e4f440364bdaa900bc70d6c262a0b973 (patch) | |
| tree | e3dc7375d120e028e5e16212b47cadf53753c87c /llvm/lib/Target/AVR | |
| parent | 4f8c3e18824278a2fc59f273af5793ee8d5e2618 (diff) | |
| download | bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.tar.gz bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.zip | |
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
Rename from addOperand to just add, to match the other method that has been
added to MachineInstrBuilder for adding more than just 1 operand.
See https://reviews.llvm.org/D28057 for the whole discussion.
Differential Revision: https://reviews.llvm.org/D28556
llvm-svn: 291891
Diffstat (limited to 'llvm/lib/Target/AVR')
| -rw-r--r-- | llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp index 1b2f2cec0bc..13080a5d72f 100644 --- a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp +++ b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp @@ -509,8 +509,8 @@ bool AVRExpandPseudo::expand<AVR::LDIWRdK>(Block &MBB, BlockIt MBBI) { const BlockAddress *BA = MI.getOperand(1).getBlockAddress(); unsigned TF = MI.getOperand(1).getTargetFlags(); - MIBLO.addOperand(MachineOperand::CreateBA(BA, TF | AVRII::MO_LO)); - MIBHI.addOperand(MachineOperand::CreateBA(BA, TF | AVRII::MO_HI)); + MIBLO.add(MachineOperand::CreateBA(BA, TF | AVRII::MO_LO)); + MIBHI.add(MachineOperand::CreateBA(BA, TF | AVRII::MO_HI)); break; } case MachineOperand::MO_Immediate: { @@ -785,9 +785,8 @@ bool AVRExpandPseudo::expandAtomicBinaryOp(unsigned Opcode, auto Op1 = MI.getOperand(0); auto Op2 = MI.getOperand(1); - MachineInstr &NewInst = *buildMI(MBB, MBBI, Opcode) - .addOperand(Op1).addOperand(Op2) - .getInstr(); + MachineInstr &NewInst = + *buildMI(MBB, MBBI, Opcode).add(Op1).add(Op2).getInstr(); f(NewInst); }); } @@ -810,15 +809,13 @@ bool AVRExpandPseudo::expandAtomicArithmeticOp(unsigned Width, unsigned StoreOpcode = (Width == 8) ? AVR::STPtrRr : AVR::STWPtrRr; // Create the load - buildMI(MBB, MBBI, LoadOpcode).addOperand(Op1).addOperand(Op2); + buildMI(MBB, MBBI, LoadOpcode).add(Op1).add(Op2); // Create the arithmetic op - buildMI(MBB, MBBI, ArithOpcode) - .addOperand(Op1).addOperand(Op1) - .addOperand(Op2); + buildMI(MBB, MBBI, ArithOpcode).add(Op1).add(Op1).add(Op2); // Create the store - buildMI(MBB, MBBI, StoreOpcode).addOperand(Op2).addOperand(Op1); + buildMI(MBB, MBBI, StoreOpcode).add(Op2).add(Op1); }); } |

