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authorTim Northover <tnorthover@apple.com>2014-04-30 16:13:26 +0000
committerTim Northover <tnorthover@apple.com>2014-04-30 16:13:26 +0000
commit7346f062b639a20164f15da77f2989c22aca349b (patch)
tree8b9fb9dbeb775078183caa2161c7613fbdbbeb94 /llvm/lib/Target/ARM64/MCTargetDesc
parentb8fb7f41938a4c5635eba25762d1dd216986003b (diff)
downloadbcm5719-llvm-7346f062b639a20164f15da77f2989c22aca349b.tar.gz
bcm5719-llvm-7346f062b639a20164f15da77f2989c22aca349b.zip
AArch64/ARM64: implement remaining TLS relocations (purely MC).
llvm-svn: 207668
Diffstat (limited to 'llvm/lib/Target/ARM64/MCTargetDesc')
-rw-r--r--llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp14
-rw-r--r--llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp1
-rw-r--r--llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp2
-rw-r--r--llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.h11
4 files changed, 18 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
index b775dd332fe..0990a701bc8 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
@@ -103,15 +103,19 @@ unsigned ARM64ELFObjectWriter::GetRelocType(const MCValue &Target,
case FK_Data_8:
return ELF::R_AARCH64_ABS64;
case ARM64::fixup_arm64_add_imm12:
- if (SymLoc == ARM64MCExpr::VK_DTPREL && IsNC)
+ if (RefKind == ARM64MCExpr::VK_DTPREL_HI12)
+ return ELF::R_AARCH64_TLSLD_ADD_DTPREL_HI12;
+ if (RefKind == ARM64MCExpr::VK_TPREL_HI12)
+ return ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12;
+ if (RefKind == ARM64MCExpr::VK_DTPREL_LO12_NC)
return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC;
- if (SymLoc == ARM64MCExpr::VK_DTPREL && !IsNC)
+ if (RefKind == ARM64MCExpr::VK_DTPREL_LO12)
return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12;
- if (SymLoc == ARM64MCExpr::VK_TPREL && IsNC)
+ if (RefKind == ARM64MCExpr::VK_TPREL_LO12_NC)
return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC;
- if (SymLoc == ARM64MCExpr::VK_TPREL && !IsNC)
+ if (RefKind == ARM64MCExpr::VK_TPREL_LO12)
return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12;
- if (SymLoc == ARM64MCExpr::VK_TLSDESC && IsNC)
+ if (RefKind == ARM64MCExpr::VK_TLSDESC_LO12)
return ELF::R_AARCH64_TLSDESC_ADD_LO12_NC;
if (SymLoc == ARM64MCExpr::VK_ABS && IsNC)
return ELF::R_AARCH64_ADD_ABS_LO12_NC;
diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
index be831b8cf0b..3c6dbc85b13 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
@@ -288,7 +288,6 @@ ARM64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12));
assert(MO.isExpr() && "Unable to encode MCOperand!");
const MCExpr *Expr = MO.getExpr();
- assert(ShiftVal == 0 && "shift not allowed on add/sub immediate with fixup");
// Encode the 12 bits of the fixup.
MCFixupKind Kind = MCFixupKind(ARM64::fixup_arm64_add_imm12);
diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp
index c772002846c..efa820b097f 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp
@@ -49,6 +49,7 @@ StringRef ARM64MCExpr::getVariantKindName() const {
case VK_DTPREL_G1_NC: return ":dtprel_g1_nc:";
case VK_DTPREL_G0: return ":dtprel_g0:";
case VK_DTPREL_G0_NC: return ":dtprel_g0_nc:";
+ case VK_DTPREL_HI12: return ":dtprel_hi12:";
case VK_DTPREL_LO12: return ":dtprel_lo12:";
case VK_DTPREL_LO12_NC: return ":dtprel_lo12_nc:";
case VK_TPREL_G2: return ":tprel_g2:";
@@ -56,6 +57,7 @@ StringRef ARM64MCExpr::getVariantKindName() const {
case VK_TPREL_G1_NC: return ":tprel_g1_nc:";
case VK_TPREL_G0: return ":tprel_g0:";
case VK_TPREL_G0_NC: return ":tprel_g0_nc:";
+ case VK_TPREL_HI12: return ":tprel_hi12:";
case VK_TPREL_LO12: return ":tprel_lo12:";
case VK_TPREL_LO12_NC: return ":tprel_lo12_nc:";
case VK_TLSDESC_LO12: return ":tlsdesc_lo12:";
diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.h b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.h
index 5cce6ece9fa..d8325465178 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.h
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.h
@@ -42,10 +42,11 @@ public:
// MOVZ/MOVK.
VK_PAGE = 0x010,
VK_PAGEOFF = 0x020,
- VK_G0 = 0x030,
- VK_G1 = 0x040,
- VK_G2 = 0x050,
- VK_G3 = 0x060,
+ VK_HI12 = 0x030,
+ VK_G0 = 0x040,
+ VK_G1 = 0x050,
+ VK_G2 = 0x060,
+ VK_G3 = 0x070,
VK_AddressFragBits = 0x0f0,
// Whether the final relocation is a checked one (where a linker should
@@ -79,6 +80,7 @@ public:
VK_DTPREL_G1_NC = VK_DTPREL | VK_G1 | VK_NC,
VK_DTPREL_G0 = VK_DTPREL | VK_G0,
VK_DTPREL_G0_NC = VK_DTPREL | VK_G0 | VK_NC,
+ VK_DTPREL_HI12 = VK_DTPREL | VK_HI12,
VK_DTPREL_LO12 = VK_DTPREL | VK_PAGEOFF,
VK_DTPREL_LO12_NC = VK_DTPREL | VK_PAGEOFF | VK_NC,
VK_GOTTPREL_PAGE = VK_GOTTPREL | VK_PAGE,
@@ -90,6 +92,7 @@ public:
VK_TPREL_G1_NC = VK_TPREL | VK_G1 | VK_NC,
VK_TPREL_G0 = VK_TPREL | VK_G0,
VK_TPREL_G0_NC = VK_TPREL | VK_G0 | VK_NC,
+ VK_TPREL_HI12 = VK_TPREL | VK_HI12,
VK_TPREL_LO12 = VK_TPREL | VK_PAGEOFF,
VK_TPREL_LO12_NC = VK_TPREL | VK_PAGEOFF | VK_NC,
VK_TLSDESC_LO12 = VK_TLSDESC | VK_PAGEOFF | VK_NC,
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