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| author | Tim Northover <tnorthover@apple.com> | 2014-05-02 14:54:15 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-02 14:54:15 +0000 |
| commit | d0b07e133b1663ed174ace67694312429b855d88 (patch) | |
| tree | c6eb2f8805cb9c44a183c9e182ea0ac5823166c9 /llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp | |
| parent | a82eaa70f17a247f6b16c31f0c13406a105ceee8 (diff) | |
| download | bcm5719-llvm-d0b07e133b1663ed174ace67694312429b855d88.tar.gz bcm5719-llvm-d0b07e133b1663ed174ace67694312429b855d88.zip | |
AArch64/ARM64: support indexed loads/stores on vector types.
While post-indexed LD1/ST1 instructions do exist for vector loads,
this patch makes use of the more flexible addressing-modes in LDR/STR
instructions.
llvm-svn: 207838
Diffstat (limited to 'llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp')
0 files changed, 0 insertions, 0 deletions
