summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2014-04-24 12:12:10 +0000
committerTim Northover <tnorthover@apple.com>2014-04-24 12:12:10 +0000
commit79ec019261e44ad5c03194aa124e4a5b1be04f7d (patch)
treedfecc805095d966b2839f8e68f902fcc6ecc384b /llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
parentcf16ec238e469dcc83d335fddaa25a713231a2aa (diff)
downloadbcm5719-llvm-79ec019261e44ad5c03194aa124e4a5b1be04f7d.tar.gz
bcm5719-llvm-79ec019261e44ad5c03194aa124e4a5b1be04f7d.zip
AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands
These can have different relocations in ELF. In particular both: b.eq global ldr x0, global are valid, giving different relocations. The only possible way to distinguish them is via a different fixup, so the operands had to be separated throughout the backend. llvm-svn: 207105
Diffstat (limited to 'llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp9
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
index 097594f0340..2ada4a4cf9e 100644
--- a/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
+++ b/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
@@ -87,9 +87,8 @@ static DecodeStatus DecodeFixedPointScaleImm32(llvm::MCInst &Inst, unsigned Imm,
static DecodeStatus DecodeFixedPointScaleImm64(llvm::MCInst &Inst, unsigned Imm,
uint64_t Address,
const void *Decoder);
-static DecodeStatus DecodeCondBranchTarget(llvm::MCInst &Inst, unsigned Imm,
- uint64_t Address,
- const void *Decoder);
+static DecodeStatus DecodePCRelLabel19(llvm::MCInst &Inst, unsigned Imm,
+ uint64_t Address, const void *Decoder);
static DecodeStatus DecodeMRSSystemRegister(llvm::MCInst &Inst, unsigned Imm,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeMSRSystemRegister(llvm::MCInst &Inst, unsigned Imm,
@@ -582,8 +581,8 @@ static DecodeStatus DecodeFixedPointScaleImm64(llvm::MCInst &Inst, unsigned Imm,
return Success;
}
-static DecodeStatus DecodeCondBranchTarget(llvm::MCInst &Inst, unsigned Imm,
- uint64_t Addr, const void *Decoder) {
+static DecodeStatus DecodePCRelLabel19(llvm::MCInst &Inst, unsigned Imm,
+ uint64_t Addr, const void *Decoder) {
int64_t ImmVal = Imm;
const ARM64Disassembler *Dis =
static_cast<const ARM64Disassembler *>(Decoder);
OpenPOWER on IntegriCloud