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authorJames Molloy <james.molloy@arm.com>2014-04-23 10:26:40 +0000
committerJames Molloy <james.molloy@arm.com>2014-04-23 10:26:40 +0000
commit650cb57067c11ea7992866892d04bd9b277de72a (patch)
tree47d97295ad020f7abf0ecd2e916c62928bc8696f /llvm/lib/Target/ARM64/ARM64TargetMachine.h
parent3a9a023eb6027654429d21114ed0f1481dd4f502 (diff)
downloadbcm5719-llvm-650cb57067c11ea7992866892d04bd9b277de72a.tar.gz
bcm5719-llvm-650cb57067c11ea7992866892d04bd9b277de72a.zip
[ARM64] Add a big endian version of the ARM64 target machine, and update all users.
This completes the porting of r202024 (cpirker "Add AArch64 big endian Target (aarch64_be)") to ARM64. llvm-svn: 206965
Diffstat (limited to 'llvm/lib/Target/ARM64/ARM64TargetMachine.h')
-rw-r--r--llvm/lib/Target/ARM64/ARM64TargetMachine.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64TargetMachine.h b/llvm/lib/Target/ARM64/ARM64TargetMachine.h
index 8274550d019..730ffcaaf6d 100644
--- a/llvm/lib/Target/ARM64/ARM64TargetMachine.h
+++ b/llvm/lib/Target/ARM64/ARM64TargetMachine.h
@@ -39,7 +39,8 @@ private:
public:
ARM64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL);
+ CodeModel::Model CM, CodeGenOpt::Level OL,
+ bool IsLittleEndian);
const ARM64Subtarget *getSubtargetImpl() const override { return &Subtarget; }
const ARM64TargetLowering *getTargetLowering() const override {
@@ -64,6 +65,28 @@ public:
void addAnalysisPasses(PassManagerBase &PM) override;
};
+// ARM64leTargetMachine - ARM64 little endian target machine.
+//
+class ARM64leTargetMachine : public ARM64TargetMachine {
+ virtual void anchor();
+public:
+ ARM64leTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
+};
+
+// ARM64beTargetMachine - ARM64 big endian target machine.
+//
+class ARM64beTargetMachine : public ARM64TargetMachine {
+ virtual void anchor();
+public:
+ ARM64beTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
+};
+
} // end namespace llvm
#endif
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