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| author | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
| commit | 840beec2d0855db9165c02bc29a79af8e357fc24 (patch) | |
| tree | cc21088e8d06f5c3158cd6fc7e00b483c9f0a817 /llvm/lib/Target/ARM64/ARM64FrameLowering.cpp | |
| parent | 79ed5d44e715537a933c399885dce58c7d877f73 (diff) | |
| download | bcm5719-llvm-840beec2d0855db9165c02bc29a79af8e357fc24.tar.gz bcm5719-llvm-840beec2d0855db9165c02bc29a79af8e357fc24.zip | |
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
llvm-svn: 205610
Diffstat (limited to 'llvm/lib/Target/ARM64/ARM64FrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64FrameLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64FrameLowering.cpp b/llvm/lib/Target/ARM64/ARM64FrameLowering.cpp index 798986ca907..3e2b0cfadf8 100644 --- a/llvm/lib/Target/ARM64/ARM64FrameLowering.cpp +++ b/llvm/lib/Target/ARM64/ARM64FrameLowering.cpp @@ -388,14 +388,14 @@ void ARM64FrameLowering::emitPrologue(MachineFunction &MF) const { } } -static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) { +static bool isCalleeSavedRegister(unsigned Reg, const MCPhysReg *CSRegs) { for (unsigned i = 0; CSRegs[i]; ++i) if (Reg == CSRegs[i]) return true; return false; } -static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) { +static bool isCSRestore(MachineInstr *MI, const MCPhysReg *CSRegs) { if (MI->getOpcode() == ARM64::LDPXpost || MI->getOpcode() == ARM64::LDPDpost || MI->getOpcode() == ARM64::LDPXi || MI->getOpcode() == ARM64::LDPDi) { @@ -424,7 +424,7 @@ void ARM64FrameLowering::emitEpilogue(MachineFunction &MF, unsigned NumRestores = 0; // Move past the restores of the callee-saved registers. MachineBasicBlock::iterator LastPopI = MBBI; - const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&MF); + const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); if (LastPopI != MBB.begin()) { do { ++NumRestores; @@ -708,7 +708,7 @@ void ARM64FrameLowering::processFunctionBeforeCalleeSavedScan( bool ExtraCSSpill = false; bool CanEliminateFrame = true; DEBUG(dbgs() << "*** processFunctionBeforeCalleeSavedScan\nUsed CSRs:"); - const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&MF); + const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); // Check pairs of consecutive callee-saved registers. for (unsigned i = 0; CSRegs[i]; i += 2) { |
