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authorDiana Picus <diana.picus@linaro.org>2017-01-20 08:15:24 +0000
committerDiana Picus <diana.picus@linaro.org>2017-01-20 08:15:24 +0000
commitbd66b7dc87e66fd3e4e761e5943a120b99d48e9a (patch)
tree98e582e192eb6042a2536ff00ab89f9bfc599424 /llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
parentae78b5dcff8159373774ed8efd81c2e6ac7efc98 (diff)
downloadbcm5719-llvm-bd66b7dc87e66fd3e4e761e5943a120b99d48e9a.tar.gz
bcm5719-llvm-bd66b7dc87e66fd3e4e761e5943a120b99d48e9a.zip
[ARM] Use helpers for adding pred / CC operands. NFC
Hunt down some of the places where we use bare addReg(0) or addImm(AL).addReg(0) and replace with add(condCodeOp()) and add(predOps()). This should make it easier to understand what those operands represent (without having to look at the definition of the instruction that we're adding to). Differential Revision: https://reviews.llvm.org/D27984 llvm-svn: 292587
Diffstat (limited to 'llvm/lib/Target/ARM/ThumbRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ThumbRegisterInfo.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp b/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
index 92025bbb992..15a56752333 100644
--- a/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
@@ -93,9 +93,10 @@ static void emitThumb2LoadConstPool(MachineBasicBlock &MBB,
unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
- .addReg(DestReg, getDefRegState(true), SubIdx)
- .addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0)
- .setMIFlags(MIFlags);
+ .addReg(DestReg, getDefRegState(true), SubIdx)
+ .addConstantPoolIndex(Idx)
+ .add(predOps(ARMCC::AL))
+ .setMIFlags(MIFlags);
}
/// emitLoadConstPool - Emits a load from constpool to materialize the
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