diff options
author | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 16:59:47 +0000 |
---|---|---|
committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 16:59:47 +0000 |
commit | 1b4e8cc69c3dc617cc284e033d0668aeb411009f (patch) | |
tree | fe2d8ee7e00ef0f6e3fbe2a14bcafbd8d887c11b /llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | |
parent | 35621a9dcce967eb02047ffc384b6e40d879ec33 (diff) | |
download | bcm5719-llvm-1b4e8cc69c3dc617cc284e033d0668aeb411009f.tar.gz bcm5719-llvm-1b4e8cc69c3dc617cc284e033d0668aeb411009f.zip |
--- Reverse-merging r98637 into '.':
U test/CodeGen/ARM/tls2.ll
U test/CodeGen/ARM/arm-negative-stride.ll
U test/CodeGen/ARM/2009-10-30.ll
U test/CodeGen/ARM/globals.ll
U test/CodeGen/ARM/str_pre-2.ll
U test/CodeGen/ARM/ldrd.ll
U test/CodeGen/ARM/2009-10-27-double-align.ll
U test/CodeGen/Thumb2/thumb2-strb.ll
U test/CodeGen/Thumb2/ldr-str-imm12.ll
U test/CodeGen/Thumb2/thumb2-strh.ll
U test/CodeGen/Thumb2/thumb2-ldr.ll
U test/CodeGen/Thumb2/thumb2-str_pre.ll
U test/CodeGen/Thumb2/thumb2-str.ll
U test/CodeGen/Thumb2/thumb2-ldrh.ll
U utils/TableGen/TableGen.cpp
U utils/TableGen/DisassemblerEmitter.cpp
D utils/TableGen/RISCDisassemblerEmitter.h
D utils/TableGen/RISCDisassemblerEmitter.cpp
U Makefile.rules
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/Makefile
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D lib/Target/ARM/Disassembler
U lib/Target/ARM/ARMInstrFormats.td
U lib/Target/ARM/ARMAddressingModes.h
U lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm-svn: 98640
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp index f36d4ef7567..f5ba155f402 100644 --- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -78,16 +78,14 @@ bool Thumb2ITBlockPass::InsertITBlocks(MachineBasicBlock &MBB) { DebugLoc ndl = NMI->getDebugLoc(); unsigned NPredReg = 0; ARMCC::CondCodes NCC = getPredicate(NMI, NPredReg); - if (NCC == CC || NCC == OCC) - Mask |= (NCC & 1) << Pos; - else + if (NCC == OCC) { + Mask |= (1 << Pos); + } else if (NCC != CC) break; --Pos; ++MBBI; } Mask |= (1 << Pos); - // Tag along (firstcond[0] << 4) with the mask. - Mask |= (CC & 1) << 4; MIB.addImm(Mask); Modified = true; ++NumITs; |