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author | Anton Korobeynikov <asl@math.spbu.ru> | 2011-03-05 18:43:32 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2011-03-05 18:43:32 +0000 |
commit | e7410dd0d5de4694293900b2f9844813bc1a2419 (patch) | |
tree | d43b949618208b308b0a6bd62ecf3d82734efb42 /llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | |
parent | 961013686ebf34f7dda928ebd1d4d9eb9005bc63 (diff) | |
download | bcm5719-llvm-e7410dd0d5de4694293900b2f9844813bc1a2419.tar.gz bcm5719-llvm-e7410dd0d5de4694293900b2f9844813bc1a2419.zip |
Preliminary support for ARM frame save directives emission via MI flags.
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
llvm-svn: 127101
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1FrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index 233e1653877..5508f6f2aa3 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -39,8 +39,8 @@ static void emitSPUpdate(MachineBasicBlock &MBB, const TargetInstrInfo &TII, DebugLoc dl, const Thumb1RegisterInfo &MRI, int NumBytes) { - emitThumbRegPlusImmediate(MBB, MBBI, ARM::SP, ARM::SP, NumBytes, TII, - MRI, dl); + emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII, + MRI); } void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const { @@ -232,8 +232,8 @@ void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF, if (NumBytes) { assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) && "No scratch register to restore SP from FP!"); - emitThumbRegPlusImmediate(MBB, MBBI, ARM::R4, FramePtr, -NumBytes, - TII, *RegInfo, dl); + emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, + TII, *RegInfo); BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP) .addReg(ARM::R4); } else |