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| author | Jim Grosbach <grosbach@apple.com> | 2011-06-29 20:26:39 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-06-29 20:26:39 +0000 |
| commit | d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff (patch) | |
| tree | 867a40a5c00bfb9b33af189160fc3a175a23a38f /llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | |
| parent | 326701e2c721f60e46b75e9b9ac97e3cdf07f018 (diff) | |
| download | bcm5719-llvm-d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff.tar.gz bcm5719-llvm-d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff.zip | |
Refactor away tSpill and tRestore pseudos in ARM backend.
The tSpill and tRestore instructions are just copies of the tSTRspi and
tLDRspi instructions, respectively. Just use those directly instead.
llvm-svn: 134092
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1FrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index e56d48168c2..80b57c9545f 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -177,7 +177,7 @@ static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) { } static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) { - if (MI->getOpcode() == ARM::tRestore && + if (MI->getOpcode() == ARM::tLDRspi && MI->getOperand(1).isFI() && isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs)) return true; |
