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author | Momchil Velikov <momchil.velikov@arm.com> | 2018-01-08 11:32:37 +0000 |
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committer | Momchil Velikov <momchil.velikov@arm.com> | 2018-01-08 11:32:37 +0000 |
commit | d17dabca31dc744ddeaf14610c948d5c8f4e0326 (patch) | |
tree | 3deda9916c966e42554a96192c3b953b9ec718c4 /llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | |
parent | 51164c409d2b1d027abbf1020fcd9333f92eaf33 (diff) | |
download | bcm5719-llvm-d17dabca31dc744ddeaf14610c948d5c8f4e0326.tar.gz bcm5719-llvm-d17dabca31dc744ddeaf14610c948d5c8f4e0326.zip |
[ARM] Fix PR35481
This patch allows `r7` to be used, regardless of its use as a frame pointer, as
a temporary register when popping `lr`, and also falls back to using a high
temporary register if, for some reason, we weren't able to find a suitable low
one.
Differential revision: https://reviews.llvm.org/D40961
Fixes https://bugs.llvm.org/show_bug.cgi?id=35481
llvm-svn: 321989
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1FrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index ba00b3d79da..a65e22fd86e 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -611,6 +611,12 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB, unsigned TemporaryReg = 0; BitVector PopFriendly = TRI.getAllocatableSet(MF, TRI.getRegClass(ARM::tGPRRegClassID)); + // R7 may be used as a frame pointer, hence marked as not generally + // allocatable, however there's no reason to not use it as a temporary for + // restoring LR. + if (STI.useR7AsFramePointer()) + PopFriendly.set(ARM::R7); + assert(PopFriendly.any() && "No allocatable pop-friendly register?!"); // Rebuild the GPRs from the high registers because they are removed // form the GPR reg class for thumb1. @@ -622,17 +628,20 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB, GPRsNoLRSP.reset(ARM::PC); findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg, TemporaryReg); - // If we couldn't find a pop-friendly register, restore LR before popping the - // other callee-saved registers, so we can use one of them as a temporary. + // If we couldn't find a pop-friendly register, try restoring LR before + // popping the other callee-saved registers, so we could use one of them as a + // temporary. bool UseLDRSP = false; if (!PopReg && MBBI != MBB.begin()) { auto PrevMBBI = MBBI; PrevMBBI--; if (PrevMBBI->getOpcode() == ARM::tPOP) { - MBBI = PrevMBBI; - UsedRegs.stepBackward(*MBBI); + UsedRegs.stepBackward(*PrevMBBI); findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg, TemporaryReg); - UseLDRSP = true; + if (PopReg) { + MBBI = PrevMBBI; + UseLDRSP = true; + } } } |