diff options
| author | Matthias Braun <matze@braunis.de> | 2017-09-28 23:12:06 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2017-09-28 23:12:06 +0000 |
| commit | 51687912a4da910426c8daf40994fde3a9ac3520 (patch) | |
| tree | 6fc94a09eb23f18e965e47e6b164f0f6606cb4fe /llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | |
| parent | 195b25cf3cbde92e8613465571b5f3511c5cc69d (diff) | |
| download | bcm5719-llvm-51687912a4da910426c8daf40994fde3a9ac3520.tar.gz bcm5719-llvm-51687912a4da910426c8daf40994fde3a9ac3520.zip | |
ARM: Fix cases where CSI Restored bit is not cleared
LR is an untypical callee saved register in that it is restored into a
different register (PC) and thus does not live-out of the return block.
This case requires the `Restored` flag in CalleeSavedInfo to be cleared.
This fixes a number of cases where this wasn't handled correctly yet.
llvm-svn: 314471
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1FrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index 85abe1d3b73..13068992e8f 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -876,13 +876,15 @@ restoreCalleeSavedRegisters(MachineBasicBlock &MBB, bool NeedsPop = false; for (unsigned i = CSI.size(); i != 0; --i) { - unsigned Reg = CSI[i-1].getReg(); + CalleeSavedInfo &Info = CSI[i-1]; + unsigned Reg = Info.getReg(); // High registers (excluding lr) have already been dealt with if (!(ARM::tGPRRegClass.contains(Reg) || Reg == ARM::LR)) continue; if (Reg == ARM::LR) { + Info.setRestored(false); if (MBB.succ_empty()) { // Special epilogue for vararg functions. See emitEpilogue if (isVarArg) |
