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authorJim Grosbach <grosbach@apple.com>2009-11-09 00:11:35 +0000
committerJim Grosbach <grosbach@apple.com>2009-11-09 00:11:35 +0000
commitd7cf55cd0eaf3664285e746b477c680e1a4775b9 (patch)
tree154397f2614f80432a90582a340fd6dc0e185777 /llvm/lib/Target/ARM/README.txt
parent058088f219006df0d40a47bd2e7c24ea45288a5e (diff)
downloadbcm5719-llvm-d7cf55cd0eaf3664285e746b477c680e1a4775b9.tar.gz
bcm5719-llvm-d7cf55cd0eaf3664285e746b477c680e1a4775b9.zip
Use Unified Assembly Syntax for the ARM backend.
llvm-svn: 86494
Diffstat (limited to 'llvm/lib/Target/ARM/README.txt')
-rw-r--r--llvm/lib/Target/ARM/README.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/README.txt b/llvm/lib/Target/ARM/README.txt
index e4c7e6b5a6d..11c48add21b 100644
--- a/llvm/lib/Target/ARM/README.txt
+++ b/llvm/lib/Target/ARM/README.txt
@@ -321,7 +321,7 @@ time.
4) Once we added support for multiple result patterns, write indexed loads
patterns instead of C++ instruction selection code.
-5) Use FLDM / FSTM to emulate indexed FP load / store.
+5) Use VLDM / VSTM to emulate indexed FP load / store.
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