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author | Simon Tatham <simon.tatham@arm.com> | 2019-06-10 15:58:19 +0000 |
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committer | Simon Tatham <simon.tatham@arm.com> | 2019-06-10 15:58:19 +0000 |
commit | 67065c5c70554c8c64286c6538181d1e5413b32d (patch) | |
tree | 25f5dd6a414185b42c08e32b7e44e518a219d55c /llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | |
parent | 42078d41d59269d4d42873cf3260b58d09d530f0 (diff) | |
download | bcm5719-llvm-67065c5c70554c8c64286c6538181d1e5413b32d.tar.gz bcm5719-llvm-67065c5c70554c8c64286c6538181d1e5413b32d.zip |
Revert rL362953 and its followup rL362955.
These caused a build failure because I managed not to notice they
depended on a later unpushed commit in my current stack. Sorry about
that.
llvm-svn: 362956
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 29 |
1 files changed, 5 insertions, 24 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp index 271959c38de..ec5fd16cd7d 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp @@ -771,13 +771,11 @@ void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) { - if (MI->getOpcode() != ARM::t2CLRM) { - assert(std::is_sorted(MI->begin() + OpNum, MI->end(), - [&](const MCOperand &LHS, const MCOperand &RHS) { - return MRI.getEncodingValue(LHS.getReg()) < - MRI.getEncodingValue(RHS.getReg()); - })); - } + assert(std::is_sorted(MI->begin() + OpNum, MI->end(), + [&](const MCOperand &LHS, const MCOperand &RHS) { + return MRI.getEncodingValue(LHS.getReg()) < + MRI.getEncodingValue(RHS.getReg()); + })); O << "{"; for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { @@ -932,15 +930,6 @@ void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, O << ARMCondCodeToString(CC); } -void ARMInstPrinter::printMandatoryRestrictedPredicateOperand( - const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, - raw_ostream &O) { - if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS) - O << "cs"; - else - printMandatoryPredicateOperand(MI, OpNum, STI, O); -} - void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, @@ -949,14 +938,6 @@ void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI, O << ARMCondCodeToString(CC); } -void ARMInstPrinter::printMandatoryInvertedPredicateOperand(const MCInst *MI, - unsigned OpNum, - const MCSubtargetInfo &STI, - raw_ostream &O) { - ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); - O << ARMCondCodeToString(ARMCC::getOppositeCondition(CC)); -} - void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) { |