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authorJohn Brawn <john.brawn@arm.com>2015-06-05 13:31:19 +0000
committerJohn Brawn <john.brawn@arm.com>2015-06-05 13:31:19 +0000
commit985c04e8fafb2489b1fa960ebba5383e9d77e91e (patch)
tree215d41abf1ba44c40d02312d62bc70d9f72f10ca /llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
parentd03d22922dee3bdb039c5926c49c4e1e5da5a734 (diff)
downloadbcm5719-llvm-985c04e8fafb2489b1fa960ebba5383e9d77e91e.tar.gz
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[ARM] Add support for -sp- FPUs and FPU none to TargetParser
These are added mainly for the benefit of clang, but this also means that they are now allowed in .fpu directives and we emit the correct .fpu directive when single-precision-only is used. Differential Revision: http://reviews.llvm.org/D10238 llvm-svn: 239151
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp')
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 251e1f56158..35e3dc4c2df 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -810,6 +810,9 @@ void ARMTargetELFStreamer::emitFPUDefaultAttributes() {
/* OverwriteExisting= */ false);
break;
+ // ABI_HardFP_use is handled in ARMAsmPrinter, so _SP_D16 is treated the same
+ // as _D16 here.
+ case ARM::FK_FPV4_SP_D16:
case ARM::FK_VFPV4_D16:
setAttributeItem(ARMBuildAttrs::FP_arch,
ARMBuildAttrs::AllowFPv4B,
@@ -824,6 +827,7 @@ void ARMTargetELFStreamer::emitFPUDefaultAttributes() {
// FPV5_D16 is identical to FP_ARMV8 except for the number of D registers, so
// uses the FP_ARMV8_D16 build attribute.
+ case ARM::FK_FPV5_SP_D16:
case ARM::FK_FPV5_D16:
setAttributeItem(ARMBuildAttrs::FP_arch,
ARMBuildAttrs::AllowFPARMv8B,
@@ -858,6 +862,7 @@ void ARMTargetELFStreamer::emitFPUDefaultAttributes() {
break;
case ARM::FK_SOFTVFP:
+ case ARM::FK_NONE:
break;
default:
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