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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
| commit | 2a57b357a3a0de2202a3fb0272d2648a205bcdfa (patch) | |
| tree | 7a78591803955adc522b572bfac72a8ce8e58e15 /llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | |
| parent | be4c2933a2c370d292122fc2187d75436aeaea83 (diff) | |
| download | bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.tar.gz bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.zip | |
[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction.
Differential Revision: https://reviews.llvm.org/D48918
llvm-svn: 336418
Diffstat (limited to 'llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 7492a7641d2..75ed40c18fa 100644 --- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -269,6 +269,10 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O, } break; } + case ARM::TSB: + case ARM::t2TSB: + O << "\ttsb\tcsync"; + return; } if (!printAliasInstr(MI, STI, O)) @@ -696,6 +700,13 @@ void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum, O << ARM_ISB::InstSyncBOptToString(val); } +void ARMInstPrinter::printTraceSyncBOption(const MCInst *MI, unsigned OpNum, + const MCSubtargetInfo &STI, + raw_ostream &O) { + unsigned val = MI->getOperand(OpNum).getImm(); + O << ARM_TSB::TraceSyncBOptToString(val); +} + void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) { |
