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authorJoe Abbey <jabbey@arxan.com>2013-03-26 13:58:53 +0000
committerJoe Abbey <jabbey@arxan.com>2013-03-26 13:58:53 +0000
commitf686be46742733054a6caa75884e4571e8cf4b61 (patch)
tree8e11cdc4bba5ce8178b7ef6e8e99d9371f44bd4a /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parentd9db9f90fbf5218a6edea70e49701bb110ee9180 (diff)
downloadbcm5719-llvm-f686be46742733054a6caa75884e4571e8cf4b61.tar.gz
bcm5719-llvm-f686be46742733054a6caa75884e4571e8cf4b61.zip
Patch by Gordon Keiser!
If PC or SP is the destination, the disassembler erroneously failed with the invalid encoding, despite the manual saying that both are fine. This patch addresses failure to decode encoding T4 of LDR (A8.8.62) which is a postindexed load, where the offset 0xc is applied to SP after the load occurs. llvm-svn: 178017
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 31a3b0b524f..ec895c3930e 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3278,7 +3278,7 @@ static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
return MCDisassembler::Fail;
}
- if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))
+ if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
return MCDisassembler::Fail;
if (load) {
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