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authorOwen Anderson <resistor@mac.com>2011-09-14 21:06:21 +0000
committerOwen Anderson <resistor@mac.com>2011-09-14 21:06:21 +0000
commitf1e384421abeab95572b944e0cdaa536bb51360f (patch)
tree400e751020a09c326c9b7d092c228dabcc09d2c7 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parent9c8b9932d6aaee79192d763b91674b050ff6f81c (diff)
downloadbcm5719-llvm-f1e384421abeab95572b944e0cdaa536bb51360f.tar.gz
bcm5719-llvm-f1e384421abeab95572b944e0cdaa536bb51360f.zip
Nested IT blocks are UNPREDICTABLE. Mark them as such when disassembling them.
llvm-svn: 139736
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 9d4449a4aa1..6b86e41c452 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -567,6 +567,10 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
// code and mask operands so that we can apply them correctly
// to the subsequent instructions.
if (MI.getOpcode() == ARM::t2IT) {
+ // Nested IT blocks are UNPREDICTABLE.
+ if (!ITBlock.empty())
+ return MCDisassembler::SoftFail;
+
// (3 - the number of trailing zeros) is the number of then / else.
unsigned firstcond = MI.getOperand(0).getImm();
unsigned Mask = MI.getOperand(1).getImm();
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