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authorOwen Anderson <resistor@mac.com>2011-08-22 23:44:04 +0000
committerOwen Anderson <resistor@mac.com>2011-08-22 23:44:04 +0000
commiteb1367b2b88319120986fed40b63272158a4ccc9 (patch)
tree3594e43c5b2fbbc00528f3192edc06b0115faa29 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parent08b5c19a4d89b9c3730baf8297831f2bf4203c8c (diff)
downloadbcm5719-llvm-eb1367b2b88319120986fed40b63272158a4ccc9.tar.gz
bcm5719-llvm-eb1367b2b88319120986fed40b63272158a4ccc9.zip
Reject invalid imod values in t2CPS instructions.
llvm-svn: 138306
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index db35c1891c0..cc2a583ab87 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -179,7 +179,8 @@ static DecodeStatus DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
-
+static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Insn,
+ uint64_t Address, const void *Decoder);
static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
uint64_t Address, const void *Decoder);
@@ -3240,3 +3241,11 @@ static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
return S;
}
+
+static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Val,
+ uint64_t Address, const void *Decoder) {
+ if (Val == 0x1) return Fail;
+ Inst.addOperand(MCOperand::CreateImm(Val));
+ return Success;
+}
+
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