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authorJim Grosbach <grosbach@apple.com>2011-08-11 22:18:00 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-11 22:18:00 +0000
commite25942154c3999f4d67a6a52d954913ac42a9d60 (patch)
tree2cff908b58140e7bd20863a9354d34462ca8f85d /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parenteca346ee1a392c37cfcf40153a87f24444187463 (diff)
downloadbcm5719-llvm-e25942154c3999f4d67a6a52d954913ac42a9d60.tar.gz
bcm5719-llvm-e25942154c3999f4d67a6a52d954913ac42a9d60.zip
ARM STRT assembly parsing and encoding.
llvm-svn: 137372
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 240293a2e67..201ccf88928 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -945,8 +945,8 @@ static bool DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn,
case ARM::STR_POST_REG:
case ARM::STRB_POST_IMM:
case ARM::STRB_POST_REG:
- case ARM::STRTr:
- case ARM::STRTi:
+ case ARM::STRT_POST_REG:
+ case ARM::STRT_POST_IMM:
case ARM::STRBT_POST_REG:
case ARM::STRBT_POST_IMM:
if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false;
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