summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
diff options
context:
space:
mode:
authorJiangning Liu <jiangning.liu@arm.com>2012-08-02 08:29:50 +0000
committerJiangning Liu <jiangning.liu@arm.com>2012-08-02 08:29:50 +0000
commit6a43bf7d74677d1ea8956766fa745a28080b464d (patch)
treeb62f8e9c70a6b51dd9ed2c2abbba5b917f75d614 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parent288e1af8c8485edef4ff6d3d3c388a05df3b0ef7 (diff)
downloadbcm5719-llvm-6a43bf7d74677d1ea8956766fa745a28080b464d.tar.gz
bcm5719-llvm-6a43bf7d74677d1ea8956766fa745a28080b464d.zip
Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue.
llvm-svn: 161162
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp11
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 6f36dcc1ef3..e47bf66e3af 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3151,9 +3151,14 @@ static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
- int imm = Val & 0xFF;
- if (!(Val & 0x100)) imm *= -1;
- Inst.addOperand(MCOperand::CreateImm(imm << 2));
+ if (Val == 0)
+ Inst.addOperand(MCOperand::CreateImm(INT32_MIN));
+ else {
+ int imm = Val & 0xFF;
+
+ if (!(Val & 0x100)) imm *= -1;
+ Inst.addOperand(MCOperand::CreateImm(imm << 2));
+ }
return MCDisassembler::Success;
}
OpenPOWER on IntegriCloud