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author | Owen Anderson <resistor@mac.com> | 2011-09-09 21:48:23 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2011-09-09 21:48:23 +0000 |
commit | 29cfe6c3683f2a80e28e3735bfb3955504d3cdd9 (patch) | |
tree | b245a1bfdef354a94f82c6de0b0c7339798f34b6 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | 8726d330f1fdf10fd4c69ef110a801ff83c31921 (diff) | |
download | bcm5719-llvm-29cfe6c3683f2a80e28e3735bfb3955504d3cdd9.tar.gz bcm5719-llvm-29cfe6c3683f2a80e28e3735bfb3955504d3cdd9.zip |
Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.
llvm-svn: 139415
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 8a081f368e6..937c65edc72 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -426,6 +426,8 @@ static void AddThumb1SBit(MCInst &MI, bool InITBlock) { // post-pass. MCDisassembler::DecodeStatus ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { + MCDisassembler::DecodeStatus S = Success; + // A few instructions actually have predicates encoded in them. Don't // try to overwrite it if we're seeing one of those. switch (MI.getOpcode()) { @@ -436,8 +438,16 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (!ITBlock.empty()) - return SoftFail; - return Success; + S = SoftFail; + else + return Success; + break; + case ARM::tB: + case ARM::t2B: + // Some instructions (mostly unconditional branches) can + // only appears at the end of, or outside of, an IT. + if (ITBlock.size() > 1) + S = SoftFail; break; default: break; @@ -466,7 +476,7 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { MI.insert(I, MCOperand::CreateReg(0)); else MI.insert(I, MCOperand::CreateReg(ARM::CPSR)); - return Success; + return S; } } @@ -477,7 +487,7 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { else MI.insert(I, MCOperand::CreateReg(ARM::CPSR)); - return Success; + return S; } // Thumb VFP instructions are a special case. Because we share their |